The present disclosure relates to data communication circuits that transmit or receive a signal via a signal line, and more particularly to a technique of preventing breakdown of data communication circuits.
In recent years, with increase in the level of integration of data communication circuits, the breakdown voltage of the data communication circuits is becoming lower and lower. For this reason, protection of the data communication circuits from breakdown is being increasingly requested. Japanese Patent Publication No. H05-218312 (Patent Document 1) discloses an open-drain output circuit constructed of first and second nMOS transistors. The source electrode of the first nMOS transistor is connected to a ground node, and a signal from a drive circuit is applied to the gate electrode of the first nMOS transistor. The source electrode of the second nMOS transistor is connected to the drain electrode of the first nMOS transistor, the drain electrode thereof is connected to an output terminal (one terminal of a current path), and the gate electrode thereof is connected to a power supply terminal. Having such a configuration, the first and second nMOS transistors can be protected from breakdown even if a voltage higher than the power supply voltage is applied to the output terminal.